1. Field of the Invention:
The present invention relates to a synchronization device and a synchronization method in a digital broadcast receiver. More particularly, the present invention relates to a device and a method capable of synchronizing decoding timing of a digital broadcast receiver.
2. Description of the Related Art:
In general, a digital broadcast receiver refers to a device for receiving and displaying a broadcast signal transmitted from a digital broadcast center. Standardization for digital broadcasting is now actively being discussed throughout the world. Digital broadcasting is largely divided into a Digital Multimedia Broadcasting (DMB) scheme in the USA and a Digital Video Broadcasting (DVB) scheme in Europe. In such digital broadcast systems, a digital broadcast center is provided with an encoder, a modulator and a transmitter for digital broadcasting transmission, and a digital broadcast receiver is provided with a tuner, a demodulator and a decoder for digital broadcasting reception.
A portable terminal with a built-in digital broadcast receiver is also being developed. Such a portable terminal with a digital broadcasting reception function must be able to process data received from respective units of the digital broadcast receiver to reproduce an image. At this time, it is preferred that a structure for performing a multimedia function of the portable terminal is constructed as compact as possible and its power consumption is small. Since a user carrying the portable terminal is mobile, the size of the portable terminal is advantageously if it is as small as possible. Therefore, research is vigorously being pursued to develop a portable terminal with a multimedia function, which has small volume and yet satisfactorily performs the corresponding multimedia function.
FIG. 1 is a bock diagram for explaining clock systems of a transmitting side for encoding and transmitting a broadcast signal and a receiving side for decoding and displaying the encoded broadcast signal in a digital broadcast system. The following description will be given on the assumption that a broadcast signal standard is Moving Picture Experts group 2 (MPEG2). However, the same principle can be applied to digital broadcasting standards other than MPEG2, such as MPEG4, H.264 and the like.
Referring to FIG. 1, reference numerals 11, 13, 15 and 17 designate a structure on a transmitting side of the digital broadcast system, and reference numerals 21, 23, 25, 27 and 29 designate a structure on a receiving side of the digital broadcast system. First, the transmitting side's operation will be described. A clock generated in a clock generator 11 is applied to an encoder 17, the encoder 17 encodes an image, and audio and data by using the clock are outputted from the clock generator 11. The transmitting side transmits transmitting side-clock information to the receiving side. A counter 13, which audio and data are inputted from the clock generator 11, counts the clock by a predetermined division ratio, stores the counted clock as a Program Clock Reference (hereinafter referred to as “PCR”) in a register 15, and then transmits the PCR to the receiving side.
Next, the receiving side's operation will be described. The receiving side stores a PCR sample in a register 27 before decoding a broadcast signal transmitted from the transmitting side. A clock generator 21 generates a decoding clock for a decoder 29. Accordingly, a clock frequency is similar to the clock generator 11 on the transmitting side, and the division ratio of a counter 23 also has the same value as that of the counter 13 on the transmitting side. A comparator 25 compares a count value outputted from the counter 23 with the PCR value stored in the register 27 on the transmitting side, and controls the clock generator 21 to supply the decoding clock to the decoder 29 when both the values are the same.
The MPEG2 system as described above uses a system clock of 27 MHz, and uses a clock corresponding to 27 MHz/N (N is an integer) during encoding and decoding. The system clock of 27 MHz outputted from the clock generator 11 is applied to the counter 13, and an output of the counter 13 is stored in the register 15 and is transmitted together with other data at an appropriate time over a transmission channel. The decoder 29 extracts PCR information from an adaptation field of each packet to store the PCR information in the PCR register 27. Then, at a point of time when the PCR stored in the register 27 is the same as the PCR received from the transmitting side (that is, at a point of time when the PCR on the receiving side is synchronized with the PCR on the transmitting side), the comparator 25 drives the clock generator 21 to supply the decoding clock to the decoder 29.
In the above-mentioned operations, the MPEG2 system does not transmit the PCR information from packet to packet, but transmits the PCR information at intervals of 100 ms. Usually, the clock generator may makes an error due to temperature, external impacts and product properties, which becomes an error source when the decoder 29 generates an internal system clock based on the PCR information. In other words, there may occur points of time when the receiving side system is not synchronized with a system clock on the transmitting side because the PCR information is transmitted at intervals. The receiving side is the closest to the transmitting side when the PCR information is received, and the error is the greatest just before the PCR information is received.
If the receiving side is loaded with the PCR value, then a 27 MHz clock source of the clock generator 21 begins to increase a local time reference value of the decoder 29. As stated above, the clock generator 21 make an error due to temperature, external impacts and product properties, which is caused by an error in the local time reference value. Thus, the local time reference value of the decoder 29 becomes different from the PCR count value of the encoder 17. However, if the clock frequency is finely corrected by a different component between the PCR value decoded within the transmission interval of 100 ms and the local time reference value, the local time reference value can consequently correspond to the PCR value of the encoder 17. This finely corrected local time reference value is called a LPCR (Local Program Clock Reference). FIG. 2 is a block diagram illustrating a structure for generating an LPCR to be supplied to the decoder 29 on the receiving side, and simultaneously is a view for explaining a method of reproducing a system PCR. The LPCR generation method using the structure as illustrated in FIG. 2 corresponds to a common PCR generation method used in a MPEG decoding system, such as a settop-box.
Referring to FIG. 2, if a received PCR value is applied to the comparator 25, the comparator 25 compares the received PCR value with the LPCR value of the counter 23 to generate an error signal according to a difference between the two input values. The received PCR value is initially different from the LPCR value, so the clock generator 21 finely corrects a generated erroneous clock (27 MHz). Thus, if a certain time elapses, the received PCR value becomes identical to the LPCR value. Through such a procedure, a LPCR for use in the receiving side can be reproduced. Also, when the LPCR value is identical to the PCR value, a divider 31 divides the clock by a predetermined division ratio to apply the divided clocks as audio, video and data decoding clocks to the decoder 29.
The digital broadcast receiver may use two time stamps in order to control the decoder. In the digital broadcast receiver, there are two types of time stamps, that is, a Decoding Timing Stamp (hereinafter referred to as “DTS”) and a Presentation Timing Stamp (hereinafter referred to as “PTS”). Here, the DTS has a PCR value at a point of time when the decoder begins to perform decoding, and the PTS has a PCR value at a point of time when a decoding result is outputted from the decoder. Thus, the digital broadcast receiver controls the decoder such that the decoder begins to decode received data when the DTS is generated, and outputs a decoded broadcast signal when the PTS is generated. Accordingly, the digital broadcast receiver may not use the PTS in a case where the DTS is used, or may not use the DTS in a case where the PTS is used.
FIG. 3 is a block diagram for explaining a synchronization procedure of a digital broadcast receiver using a DTS, and FIG. 4 is a timing chart illustrating timing for controlling a decoding operation in a synchronization structure as shown in FIG. 3.
Referring to FIGS. 3 and 4, the digital broadcast receiver begins to perform decoding of audio, video and/or data in coincident with DTS information. That is, the synchronization of a decoder (audio, video and/or data decoder) is implemented by a DTS. First, if a digital broadcast signal is received, a PCR/DTS extractor 41 extracts a PCR and a DTS from the received digital broadcast signal to output a video DTS (hereinafter referred to as “VDTS”) and an audio DTS (hereinafter referred to as “ADTS”) to a decoder 45, respectively, as indicated by reference numerals 53 and 55 in FIG. 4. Here, the decoder 45 may be an audio and video decoder. Also, a LPCR generator 43 having a structure as shown in FIG. 2 generates a LPCR synchronized with the PCR, as indicated by reference numeral 51 in FIG. 4. Then, the decoder 45 decodes and outputs the digital broadcast signal at a point of time when the DTS becomes identical to the LPCR value. That is, the LPCR value continually increases by an internal counter of the decoder 45, as indicated by reference numeral 51 in FIG. 4. The corresponding decoder decodes and outputs data stored in an input buffer with reference to the DTS information outputted from the PCR/DTS extractor at a point of time when the LPCR value becomes identical to the DTS, as indicated by reference numerals 53 and 55 in FIG. 4. At this time, an outputting time of the decoder 45 is delayed by a decoding time of the decoder 45.
FIG. 5 is a block diagram for explaining a synchronization procedure of a digital broadcast receiver using a PTS, and FIG. 6 is a timing chart illustrating timing for controlling a decoding operation in a synchronization structure as shown in FIG. 5.
Referring to FIGS. 5 and 6, outputs of a video decoder 65 and an audio decoder 69 are synchronized with each other by using a LPCR and a PTS in FIG. 5. That is, a PCR/PTS extractor 61 extracts PCR information and PTS information from a received digital broadcast signal. Here, the PTS information may be APTS and VPTS information. Then, a LPCR generator 63 generates a LPCR from the PCR, as indicated by reference numeral 81 in FIG. 6, and the video decoder 65 and the audio decoder 69 decode encoded video data and encoded audio data from the received digital broadcast signal, respectively. Also, a video output buffer 67 buffers the video data decoded in the video decoder 65, and outputs the buffered video data at a point of time when the LPCR becomes identical to the VPTS, as indicated by reference numeral 83 in FIG. 6. An audio output buffer 71 buffers the audio data decoded in the audio decoder 69, and outputs the buffered audio data at a point of time when the LPCR becomes identical to the APTS, as indicated by reference numeral 85 in FIG. 6.
However, the decoder synchronization method as stated above must include the LPCR generator for generating the LPCR based on the PCR after the PCR is received. That is, the LPCR generator functions to generate the LPCR corresponding to the PCR transmitted from the transmitting side, and the LPCR is used as a PCR for controlling decoding timing of the audio, video and data decoder. Since a clock generator is included inside the LPCR generator, and the clock generator must generate a clock at high frequency, the LPCR generator requires high precision. Also, the above-mentioned decoding synchronization method of the digital broadcast receiver must make use of the LPCR. In this case, a counter capable of maintaining a preset level (for example, in FIG. 2, 90 KHz) must be designed, and such counter design is difficult to be supported by an Operating System (OS) of a portable terminal with the digital broadcast receiver.
As stated above, the DTS and the PTS are generally used as a synchronization signal for controlling decoding timing of the digital broadcast receiver. At this time, the intermittence of an audio signal is more sensitively perceived as compared with a video signal, so the audio signal is continuously reproduced. Thus, a decoding control signal (ADTS or APTS) of the audio signal can be used if the audio signal becomes identical to the PCR value. That is, decoding timing of audio and video can be controlled with reference to the ADTS or APTS. Since the audio signal has the very short necessary time for decoding, the ADTS and the APTS substantially have the same value. Therefore, after a PCR on a receiving side is set by estimating the PCR value from the ADTS or APTS value, audio decoding timing can be controlled using the ADTS or APTS, and video decoding timing can be controlled by synchronizing a VDTS or VPTS with the ADTS or APTS.
Accordingly, there is a need for an improved synchronization device and synchronization method in a digital broadcast receiver that estimates and reproduces a Program Clock Referencing for controlling decoding timing.